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32186 Datasheet(PDF) 126 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 126 Page - Renesas Technology Corp |
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126 / 1032 page ![]() INTERRUPT CONTROLLER (ICU) 5 5-2 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 5.1 Outline of Interrupt Controller The Interrupt Controller (ICU) manages maskable interrupts from internal peripheral I/Os and a system break interrupt (SBI). The maskable interrupts from internal peripheral I/Os are sent to the M32R CPU as external interrupts (EI). The maskable interrupts from internal peripheral I/Os are managed by assigning them one of eight priority levels including an interrupt-disabled state. If two or more interrupt requests with the same priority level occur at the same time, their priorities are resolved by predetermined hardware priority. The source of an interrupt request generated in internal peripheral I/Os is identified by reading the relevant interrupt status register provided for internal peripheral I/Os. On the other hand, the system break interrupt (SBI) is recognized when a low-going transition occurs on the SBI# signal input pin. This interrupt is used for emergency purposes such as when power outage is detected or a fault condition is notified by an external watchdog timer, so that it is always accepted irrespective of the PSW register IE bit status. When the CPU has finished servicing an SBI, shut down or reset the system without returning to the program that was being executed when the interrupt occurred. Specifications of the Interrupt Controller are outlined below. Table 5.1.1 Outline of the Interrupt Controller (ICU) Item Specification Interrupt request source Maskable interrupt requests from internal peripheral I/Os : 40 sources (Note 1) System break interrupt request : 1 source (entered from SBI# pin) Priority management 8 priority levels including an interrupt-disabled state (However, interrupts with the same priority level have their priorities resolved by fixed hardware priority.) Note 1: It is the number which summarized the number of interrupt requests for every group, and they are 257 factors as an interrupt request factor total. 5.1 Outline of Interrupt Controller |
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