32186 datasheet(235/1032 Pages) RENESAS

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INPUT/OUTPUT PORTS AND PIN FUNCTIONS

8-33

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

8.4 Port Input Level Switching Function

Port Group 0,1 Input Level Setting Register (PG01LEV)

<Address: H’0080 0500>

Port Group 3 Input Level Setting Register (PG3LEV)

<Address: H’0080 0501>

Note: • The PG3LEV register bits 8–11 have no functions assigned.

Port Group 4,5 Input Level Setting Register (PG45LEV)

<Address: H’0080 0502>

Port Group 6,7 Input Level Setting Register (PG67LEV)

<Address: H’0080 0503>

Port Group 8 Input Level Setting Register (PG8LEV)

<Address: H’0080 0504>

Note: • The PG8LEV register bits 4–7 have no functions assigned.

11121314

b15

WF3SEL

PT3SEL

VT3SEL0

VT3SEL1

000

00001

3456

WF0SEL

PT0SEL

VT0SEL0

VT0SEL1

WF1SEL

PT1SEL

VT1SEL0

VT1SEL1

000

10001

3456

WF4SEL

PT4SEL

VT4SEL0

VT4SEL1

WF5SEL

PT5SEL

VT5SEL0

VT5SEL1

000

10001

11121314

b15

WF6SEL

PT6SEL

VT6SEL0

VT6SEL1

WF7SEL

PT7SEL

VT7SEL0

VT7SEL1

000

10001

3456

WF8SEL

PT8SEL

VT8SEL0

VT8SEL1

000

10000

<Upon exiting reset: :H'11, H'01, H'10> (Note 2)

Bit Name

Function

0(4)

WFnSEL (Note 1)

0: Select standard input for each pin

8(12)

Group n dual-function input select bit

1: Select threshold switching function

1-3

PTnSEL

000 : FInput CMOS, Select 0.35VCCE

(9 – 11)

(Group n port input select bit )

001 : Input CMOS, Select 0.50VCCE

VTnSEL0, VTnSEL1

010 : Input CMOS, Select 0.70VCCE

(Group n input threshold select bit)

011 : Settings inhibited

100 : Schmitt input , VT += 0.50VCCE, VT -= 0.35VCCE

101 : Settings inhibited

110 : Schmitt input , VT += 0.70VCCE, VT -= 0.35VCCE

111 : Schmitt input , VT += 0.70VCCE, VT -= 0.50VCCE

4(12)

WFnSEL (Note 1)

0: Select standard input for each pin

Group n dual-function input select bit

1: Select threshold switching function

5 – 7

PTnSEL

000 : Input CMOS, Select 0.35VCCE

(13 – 15) (Group n port input select bit)

001 : Input CMOS, Select 0.50VCCE

VTnSEL0, VTnSEL1

010 : Input CMOS, Select 0.70VCCE

(Group n input threshold select bit)

011 : Settings inhibited

100 : Schmitt input , VT += 0.50VCCE, AVT -= 0.35VCCE

101 : Settings inhibited

110 : Schmitt input , VT += 0.70VCCE, AVT -= 0.35VCCE

111 : Schmitt input , VT += 0.70VCCE, AVT -= 0.50VCCE

Note 1: When the multipurpose port function pin is selected (Set bit corresponding Px operation mode register(PxMOD) to "0."),

setting value for WFnSEL is invalid and threshold switch function is effective.

Note 2: Upon exiting reset, VTnSEL1 bit value is "1" and the other bit is set to "0."

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