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HD64F7047 Datasheet(PDF) 93 Page - Renesas Technology Corp |
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HD64F7047 Datasheet(HTML) 93 Page - Renesas Technology Corp |
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93 / 764 page ![]() Rev. 2.00, 09/04, page 53 of 720 4.1.2 External Clock Input Method Figure 4.4 shows an example of an external clock input connection. In this case, make the external clock high level to stop it in standby mode. During operation, make the external input clock frequency 4 to 12.5 MHz. When leaving the XTAL pin open, make sure the stray capacitance is less than 10 pF. Even when inputting an external clock, be sure to wait at least the oscillation stabilization time in power-on sequence or in releasing standby mode, in order to ensure the PLL stabilization time. EXTAL XTAL External clock input Open state Figure 4.4 Example of External Clock Connection |
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