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HD64F7047 Datasheet(PDF) 96 Page - Renesas Technology Corp |
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HD64F7047 Datasheet(HTML) 96 Page - Renesas Technology Corp |
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96 / 764 page ![]() Rev. 2.00, 09/04, page 56 of 720 A circuitry shown in figure 4.6 is recommended as an external circuitry around the PLL. Place oscillation stabilization capacitor C1 close to the PLLCAP pin, and ensure that no other signal lines cross this line. Separate PLLVcL and PLLVss circuit against Vcc and Vss circuit from the board power supply source, and be sure to insert bypass capacitors CB and CPB close to the pins. PLLCAP PLLVCL PLLVSS VCC VSS C1: 470 pF R1: 3k Ω CPB = 0.47 µF* CB = 0.47 µF* (Values are recommended values.) Note: * CB and CPB are laminated ceramic type. Figure 4.6 Recommended External Circuitry Around the PLL Electromagnetic waves are radiated from an LSI in operation. This LSI has an electromagnetic peak in the harmonics band whose primary frequency is determined by the lower frequency between the system clock ( φ) and peripheral clock (Pφ). For example, when φ = 50 MHz and Pφ = 40 MHz, the primary frequency is 40 MHz. If this LSI is used adjacent to a device sensitive to electromagnetic interference, e.g. FM/VHF band receiver, a printed circuit board of more than four layers with planes exclusively for system ground is recommended. |
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