HD64F7047 datasheet(232/764 Pages) RENESAS

232 / 764 page

Rev. 2.00, 09/04, page 192 of 720

Bit

Bit Name

Initial

value

R/W

Description

R/W

Output Phase Switch 2 to 0

These bits set the positive phase/negative phase output

phase on or off state. The setting of these bits is valid only

when the FB bit in this register is set to 1. In this case, the

setting of bits 2 to 0 is a substitute for external input. See

table 10.28.

Table 10.28 Output level Select Function

Function

Bit 2

Bit 1

Bit 0

TIOC3B

TIOC4A

TIOC4B

TIOC3D

TIOC4C

TIOC4D

U Phase

V Phase

W Phase

U Phase

V Phase

W Phase

OFF

10.3.13

Timer Subcounter (TCNTS)

TCNTS is a 16-bit read-only counter that is used only in complementary PWM mode. The initial

value is H'0000.

Note:

Accessing the TCNTS in 8-bit units is prohibited. Always access in 16-bit units.

10.3.14

Timer Dead Time Data Register (TDDR)

TDDR is a 16-bit register, used only in complementary PWM mode, that specifies the TCNT_3

and TCNT_4 counter offset values. In complementary PWM mode, when the TCNT_3 and

TCNT_4 counters are cleared and then restarted, the TDDR register value is loaded into the

TCNT_3 counter and the count operation starts. The initial value is H'FFFF.

Note:

Accessing the TDDR in 8-bit units is prohibited. Always access in 16-bit units.

HD64F7047 Datasheet(PDF) 232 Page - Renesas Technology Corp

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