HD64F7047 datasheet(313/764 Pages) RENESAS

313 / 764 page

Rev. 2.00, 09/04, page 273 of 720

10.7.18

Cautions on Transition from Normal Operation or PWM Mode 1 to Reset-

Synchronous PWM Mode

When making a transition from channel 3 or 4 normal operation or PWM mode 1 to reset-

synchronous PWM mode, if the counter is halted with the output pins (TIOC3B, TIOC3D,

TIOC4A, TIOC4C, TIOC4B, TIOC4D) in the high-impedance state, followed by the transition to

reset-synchronous PWM mode and operation in that mode, the initial pin output will not be

correct.

When making a transition from normal operation to reset-synchronous PWM mode, write H'11 to

registers TIORH_3, TIORL_3, TIORH_4, and TIORL_4 to initialize the output pins to low level

output, then set an initial register value of H'00 before making the mode transition.

When making a transition from PWM mode 1 to reset-synchronous PWM mode, first switch to

normal operation, then initialize the output pins to low level output and set an initial register value

of H'00 before making the transition to reset-synchronous PWM mode.

10.7.19

Output Level in Complementary PWM Mode and Reset-Synchronous PWM Mode

When channels 3 and 4 are in complementary PWM mode or reset-synchronous PWM mode, the

PWM waveform output level is set with the OLSP and OLSN bits in the timer output control

TIOR should be set to H'00.

10.7.20

Interrupts in Module Standby Mode

If module standby mode is entered when an interrupt has been requested, it will not be possible to

clear the CPU interrupt source or the DTC activation source. Interrupts should therefore be

disabled before entering module standby mode.

10.7.21

Simultaneous Input Capture of TCNT-1 and TCNT-2 in Cascade Connection

When cascade-connected timer counters (TCNT-1 and TCNT-2) are operated, cascade values

cannot be captured even if input capture is executed simultaneously with TIOC1A or TIOC1B and

TIOC2A or TIOC2B.

HD64F7047 Datasheet(PDF) 313 Page - Renesas Technology Corp