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7721 Datasheet(PDF) 407 Page - Renesas Technology Corp

Part # 7721
Description  16-BIT SINGLE-CHIP MICROCOMPUTER
PDF  577 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7721 Datasheet(HTML) 407 Page - Renesas Technology Corp

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APPLICATION
7721 Group User’s Manual
16–4
16.1 Memory connection
16.1.2 How to calculate timing
Timings at which data is read or written when connecting a memory and precautions when connecting a
memory are described below.
For timing requirements of the memory and detailed account except limits described below, also refer to
the memory’s Data book etc. When using bus buffers, various logical circuits, etc., be sure to consider the
propagation delay time etc.
(1)
Timing for reading data
When reading data, the external data bus is placed in a floating state, and data is read from the
_
external memory. This floating state is maintained after the falling edge of the E signal until an
_
interval of tpzx(E–DLZ/DHZ) has passed after the rising edge of the E signal. Satisfy tsu(DL/DH-E) when inputting
data read from the external memory.
The following are described below:
•Timing for reading data from the flash memory, SRAM, and DRAM
•Calculation formulas for the external memory’s access time, which are for tsu(DL/DH-E) to be satisfied
___
__
The memory output enable signal (OE) is assumed to be generated from the E signal.
q Timing for reading data from flash memory and SRAM
Fig. 16.1.1 Timing for reading data from flash memory and SRAM
External memory
data output
V1: This applies when the external data bus has a width of 16 bits (BYTE = “L”).
External memory
output enable signal
(Read signal)
OE
E
External memory
chip select signal
CE, S
V2: If data is output from the external memory before the falling edge of E, there is a possibility that the tail of
address collides wit
t
h the head of data.
of
collides wi h the head of
.
→ Refer to section “(3) Precautions on memory connection.”
V3: If one of the external memory’s specifications is greater than tpzx(E-DLZ/DHZ) , there is a possibility that the tail
→ Refer to section “(3) Precautions on memory connection.”
Address output and Data input
A8
/D8–A15/D15
A16/D0–A23/D7
V1
ten(OE)
Address
tpzx(E-DLZ/DHZ)
tsu(DL/DH-E)
: Specifications of the M37721
(The others are specifications of
external memory.)
ta(OE)
tDF, tdis(OE)
V2
V3
tw(EL)
Data
ten(CE), ten(S)
Address
ta(CE), ta(S)
ta(AD), tsu(A-DL/DH)
Note: tsu(A-DL/DH) : tsu(A-DL) or tsu(A-DH)
tpzx(E-DLZ/DHZ) : tpzx(E-DLZ) or tpzx(E-DHZ)
tsu(DL/DH-E) : tsu(DL-E) or tsu(DH-E)
data
address



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