7721 datasheet(418/577 Pages) RENESAS

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APPLICATION

7721 Group User’s Manual

16–15

16.1 Memory connection

When data is output from external memory before falling edge of E signal

Because the external memory outputs data before the falling edge of the E signal, there is a

possibility that the tail of address collides with the head of data. In such a case, generate the

external memory read signal (OE) by using E. (Refer to “Figure 16.1.11.”)

Fig. 16.1.11 Example of making data output timing delayed

When using external memory that outputs data for more than tpzx(E-DLZ/DHZ) after rising edge of

E signal

Because the external memory outputs data for more than tpzx(E-DLZ/DHZ) after the rising edge of the

E signal, there is a possibility that the tail of data collides with the head of address. In such a case,

try to carry out the following:

q Cut the tail of data output from the memory by using, for example, a bus buffer.

q Use the Mitsubishi’s memory chips that can be connected without a bus buffer.

Figures 16.1.12 to 16.1.15 show examples of using bus buffers and the timing charts. Table 16.1.6

lists the Mitsubishi’s memory chips that can be connected without a bus buffer. When using one

of these memory chips, timing parameters tDF and tdis(OE) listed below are guaranteed. Accordingly,

___

no bus buffer is necessary for the system where the external memory’s read signal (OE) goes high

within tpzx(E-DLZ/DHZ)-tDF (or tdis(OE)) [ns] after the rising edge of the E signal.

Table 16.1.6 Mitsubishi’s memory chips that can be connected without bus buffers

Note: Make sure that d

≥ 0 is satisfied when generating the external

memory read signal (OE).

External memory

output enable signal

(Read signal)

Address

ta(OE)

Address output

External memory

data output

Specifications of

external memory

ten(OE)

Address

Data

Memory

Flash memory

SRAM

Type

M5M28F101AP, FP, J, VP, RV-85, -10

M5M28F102AFP, J, VP-85, -10

M5M5256DP, FP, KP, VP, RV-45LL, -45XL, -55LL, -55XL,

-70LL, -70XL

M5M5278DP, J-12

M5M5278DP, FP, J-15, -15L

M5M5278DP, FP, J-20, -20L

tDF/tdis(OE) (Maximum)

15 ns

(Guaranteed as kit.)

(Note)

6 ns

7 ns

8 ns

Note: tDF or tdis(OE) listed above is guaranteed when these memory chips are connected with the M37721.

When the user wants specifications of these memory chips, add a comment “tDF/tdis(OE) = 15 ns,

microcomputer and kit.”

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