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7721 Datasheet(PDF) 240 Page - Renesas Technology Corp |
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7721 Datasheet(HTML) 240 Page - Renesas Technology Corp |
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240 / 577 page  7721 Group User’s Manual 11–37 SERIAL I/O 11.4 Clock asynchronous serial I/O (UART) mode Fig. 11.4.5 Detection of transmit completion [When not using interrupts] [When using interrupts] UARTi transmit interrupt UART0 transmit interrupt control register (Address 7116) UART1 transmit interrupt control register (Address 7316) b7 b0 Interrupt request bit Checking start of transmission UART0 transmit/receive control register 0 (Address 3416) UART1 transmit/receive control register 0 (Address 3C16) b7 b0 Checking completion of transmission. Transmit register empty flag 0: During transmission 1: Transmission completed Processing at completion of transmission 0: 1: No interrupt requested Interrupt requested (Transmission has started.) A UARTi transmit interrupt request occurs when transmission starts. Note : This figure shows the bits and registers required for processing. Refer to “Figures 11.4.6 to 11.4.8” for the change of flag state and the occurrence timing of an interrupt request. |
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