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7721 Datasheet(PDF) 290 Page - Renesas Technology Corp |
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7721 Datasheet(HTML) 290 Page - Renesas Technology Corp |
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290 / 577 page ![]() 7721 Group User’s Manual 13-11 DMA CONTROLLER 13.2.3 DMAC control register H Figure 13.2.5 shows the structure of DMAC control register H. Each of bits 0–3 is a software DMAi (i = 0 to 3) request bit, which corresponds to each channel. When a software DMA source is selected as a DMA request source, each of these bits is valid. (Refer to “13.3.2 DMA requests.”) Bits 4–7 are described in section “13.3.1 DMA enabling.” Fig. 13.2.5 Structure of DMAC control register H 13.2 Block description 1 : DMA request (Valid when software DMA source is selected.) The value is “0” at reading. Bit Bit name Functions At reset RW 0 1 Software DMA0 request bit 0 0 : Disabled 1 : Enabled 0 DMAC control register H (Address 6916) b1 b0 b2 b3 b4 b5 b6 b7 WO RW 0WO 0 RW 4 5 6 7 DMA0 enable bit 0RW 0 RW 0 0 WO WO Software DMA1 request bit Software DMA2 request bit Software DMA3 request bit 2 3 DMA0 enable bit DMA1 enable bit DMA2 enable bit DMA3 enable bit Note: When any of bits 4 to 7 is set to “1,” use the CLB or SEB instruction for writing to this register. |
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