7906 datasheet(434/531 Pages) RENESAS

434 / 531 page

7906 Group User’s Manual Rev.2.0

20-29

APPENDIX

Appendix 2. Control registers

Bit name

Bit

Processor mode register 0 (Address 5E16)

Function

At reset

R/W

Processor mode bits

Interrupt priority detection time

select bits

Software reset bit

Fix this bit to “0.”

b7 b6 b5 b4 b3 b2 b1 b0

0 0 : Single-chip mode

0 1 : Do not select.

1 0 : Do not select.

1 1 : Do not select.

b1 b0

0 0 : 7 cycles of fsys

0 1 : 4 cycles of fsys

1 0 : 2 cycles of fsys

1 1 : Do not select.

b5 b4

The microcomputer is reset by writing “1” to this

bit. The value is “0” at reading.

Reference

2-20

6-12

3-3

0X X 0 0

Any of these bits may be either “0” or “1.”

X : It may be either “0” or “1.”

6 to 2

Processor mode register 1 (Address 5F16)

Bit name

Bit

Function

At reset

R/W

b7 b6 b5 b4 b3 b2 b1 b0

0 : Only DPR0 is used.

1 : DPR0 through DPR3 are used.

0 : 3

1 : 2

(Note 1)

This bit may be either “0” or “1.”

Direct page register switch bit

Fix these bits to “00000.”

Internal ROM bus cycle select bit

(Note 2)

X : It may be either “0” or “1.”

Notes 1: After reset, this bit is allowed to be changed only once. (During the software execution, be sure not to change this bit’s

content.)

2: To reprogram the internal flash memory by using the CPU reprogramming mode, clear this bit to “0.” (Refer to section

“19.2 Flash memory CPU reprogramming mode.”)

Reference

2-6

2-12

0 00 0 0

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