32174 datasheet(53/881 Pages) RENESAS

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2-6

32170/32174 Group User's Manual (Rev. 2.1)

2.4 Accumulator

The accumulator (ACC) is a 56-bit register used by DSP function instructions. When read out or

written to, it is handled as a 64-bit register. When reading, the value of bit 8 is sign-extended. When

writing, bits 0--7 are ignored. Also, the accumulator is used by the multiplication instruction "MUL."

Note that when executing this instruction, the value of the accumulator is destroyed.

The "MVTACHI" and "MVTACLO" instructions are used to write to the accumulator. The

"MVTACHI" instruction writes data to the 32 high-order bits (bits 0-31), and the "MVTACLO"

instruction writes data to the 32 low-order bits (bits 32-63).

The "MVFACHI," "MVFACLO," and "MVFACMI" instructions are used to read data from the

accumulator. The "MVFACHI" instruction reads data from the 32 high-order bits (bits 0-31), the

"MVFACLO" instruction reads data from the 32 low-order bits (bits 32-63), and the "MVFACHI"

instruction reads data from the 32 middle bits (bits 16-47).

CPU

2.4 Accumulator

Note: Bits 0-7 always show the sign-extended value of bit 8. Writes to this bit field are ignored.

31(LSB)

0(MSB)

2.5 Program Counter

The Program Counter (PC) is a 32-bit counter used to hold the address of the currently executed

instruction. Because M32R instructions each start from an even address, the LSB (bit 31) is always

63(LSB)

0(MSB)

Range of bits read by MVFACMI

instruction

Range of bits read/written to by

MVFACHI/MVTACHI instructions

Range of bits read/written to by

MVFACLO/MVTACLO instructions

ACC

(Note)

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