32174 datasheet(76/881 Pages) RENESAS

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3-15

32170/32174 Group User's Manual (Rev. 2.1)

ADDRESS SPACE

3.4 Internal ROM/SFR Area

Figure 3.4.6 Register Mapping of the SFR Area (2)

H’0080 00DA

H’0080 00DC

H’0080 00DE

H’0080 00E0

H’0080 00E4

H’0080 00E6

H’0080 00E8

H’0080 00EA

H’0080 00EC

H’0080 00EE

H’0080 0100

H’0080 0102

H’0080 0110

H’0080 0112

H’0080 0114

H’0080 0116

H’0080 0120

H’0080 0126

+0 Address

+1 Address

D15

H’0080 0122

H’0080 0130

SIO1 Baud Rate Register (S1BAUR)

SIO0 Transmit Buffer Register (S0TXB)

SIO0 Receive Buffer Register (S0RXB)

SIO23 Interrupt Status Register (SI23STAT)

8-bit A-D0 Data Register 5 (AD08DT5)

8-bit A-D0 Data Register 6 (AD08DT6)

8-bit A-D0 Data Register 7 (AD08DT7)

8-bit A-D0 Data Register 8 (AD08DT8)

8-bit A-D0 Data Register 9 (AD08DT9)

8-bit A-D0 Data Register 10 (AD08DT10)

8-bit A-D0 Data Register 11 (AD08DT11)

8-bit A-D0 Data Register 12 (AD08DT12)

8-bit A-D0 Data Register 13 (AD08DT13)

8-bit A-D0 Data Register 14 (AD08DT14)

8-bit A-D0 Data Register 15 (AD08DT15)

H’0080 0132

H’0080 0134

H’0080 0136

H’0080 0140

H’0080 0142

H’0080 0144

H’0080 0146

H’0080 0180

H’0080 0200

H’0080 0202

H’0080 0210

H’0080 0212

H’0080 0214

Address

H’0080 00E2

SIO03 Interrupt Mask Register (SI03MASK)

SIO03 Receive Interrupt Cause Select Register (SI03SEL)

SIO0 Transmit Control Register (S0TCNT)

SIO0 Transmit/Receive Mode Register (S0MOD)

SIO0 Receive Control Register (S0RCNT)

H’0080 0124

SIO1 Baud Rate Register (S1BAUR)

SIO1 Transmit Buffer Register (S1TXB)

SIO1 Receive Buffer Register (S1RXB)

SIO1 Transmit Control Register (S1TCNT)

SIO0 Transmit/Receive Mode Register (S1MOD)

SIO1 Receive Control Register (S1RCNT)

SIO2 Baud Rate Register (S2BAUR)

SIO2 Transmit Buffer Register (S2TXB)

SIO2 Receive Buffer Register (S2RXB)

SIO2 Transmit Control Register (S2TCNT)

SIO2 Transmit/Receive Mode Register (S2MOD)

SIO2 Receive Control Register (S2RCNT)

SIO3 Baud Rate Register (S3BAUR)

SIO3 Transmit Buffer Register (S3TXB)

SIO3 Receive Buffer Register (S3RXB)

SIO3 Transmit Control Register (S3TCNT)

SIO3 Transmit/Receive Mode Register (S3MOD)

SIO3 Receive Control Register (S3RCNT)

Wait Cycles Control Register (WTCCR)

H’0080 0204

Clock Bus & Input Event Bus Control Register (CKIEBCR)

Prescaler Register 0 (PRS0)

Output Event Bus Control Register (OEBCR)

Prescaler Register 1 (PRS1)

Prescaler Register 2 (PRS2)

TCLK Input Processing Control Register (TCLKCR)

TIN Input Processing Control Register 0 (TINCR0)

TIN Input Processing Control Register 1 (TINCR1)

H’0080 00D2

H’0080 00D4

H’0080 00D6

H’0080 00D8

8-bit A-D0 Data Register 1 (AD08DT1)

8-bit A-D0 Data Register 2 (AD08DT2)

8-bit A-D0 Data Register 3 (AD08DT3)

8-bit A-D0 Data Register 4 (AD08DT4)

Blank addresses are reserved areas.

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