32174 datasheet(91/881 Pages) RENESAS

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32170/32174 Group User's Manual (Rev. 2.1)

ADDRESS SPACE

3.5 EIT Vector Entry

The EIT vector entry is located at the beginning of the internal ROM/extended external areas.

Instructions for branching to the start addresses of respective EIT event handlers are written here.

Note that it is branch instructions and not the jump addresses that are written here. For details, refer

to Chapter 4, "EIT."

Figure 3.5.1 EIT Vector Entry

Note: When flash entry bit = 1 (i.e., flash enable mode), the EI vector entry is at H'0080 4000.

H’0000 0040

TRAP0

TRAP1

TRAP2

TRAP3

TRAP4

TRAP5

TRAP6

TRAP7

TRAP8

TRAP9

TRAP10

TRAP11

TRAP12

TRAP13

TRAP14

TRAP15

AE (Address Exception)

EI (External Interrupt) (Note)

H’0000 0044

H’0000 0048

H’0000 004C

H’0000 0050

H’0000 0054

H’0000 0058

H’0000 005C

H’0000 0060

H’0000 0064

H’0000 0068

H’0000 006C

H’0000 0070

H’0000 0074

H’0000 0078

H’0000 007C

H’0000 0080

RI (Reset Interrupt)

SBI (System Break Interrupt)

RIE

(Reserved Instruction Exception)

H’0000 0030

H’0000 0020

H’0000 0010

H’0000 0000

031

H’0000 0034

H’0000 0038

H’0000 003C

H’0000 0024

H’0000 0028

H’0000 002C

H’0000 0004

H’0000 0008

H’0000 000C

H’0000 0014

H’0000 0018

H’0000 001C

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