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AD7280

Preliminary Technical Data

Rev. PrD | Page 18 of 33

AD7280

VT6

VT5

VT4

VT3

VT2

VT1

VTTERM

VREG

VSS

Rterm

Figure 18. Typical Circuit using the Thermistor Termination Resistor

In the example shown the termination resistor is placed

between the source voltage and the thermistor in the thermistor

circuit. The VTTERM input may be used to terminate the

thermistor inputs to either high or low voltage of the

Thermistor circuit.

POWER REQUIREMENTS

The current consumed by the AD7280 in normal operation, that

is when not in powerdown mode, is dependant on the mode in

which the part is being operated. In a typical Lithium Ion

battery monitoring application there are 3 distinct modes of

operation. These can be described as follows:

•

Voltage and Temperature Conversion

•

AD7280 Configuration & Data Readback

•

Cell Balancing

The AD7280 consumes its highest level of current while

converting voltage and/or temperature inputs to digital outputs.

Depending on the configuration of the AD7280 the conversion

time can be as little as 6us. As outlined in Table 1 the typical

current required by the AD7280 during conversion is 7mA.

When configuring the chain of AD7280s or when reading back

the voltage and/or temperature conversion results from a chain

of AD7280s the current required for each AD7280 is typically

4mA, as outlined in Table 1. The time required to read back the

voltage conversions results from 96 Lithium Ion cells will

depend on the speed of the interface clock used, that is SCLK,

but it can be as low as 2.5ms.

The typical current consumed by the AD7280 when the cell

balancing outputs are switched on is 1mA. The duration of the

Cell Balance outputs on time is defined by the user.

When the AD7280 is not being used in any of the above modes

of operation it is recommended that the AD7280 be powered

down, as outlined below. This will significantly reduce the

current draw by each AD7280 on the chain which will avoid

unnecessary draining of the Lithium Ion cells.

POWER DOWN

The AD7280 provides a number of power down options. These

may be described as follows:

•

Full, or Hardware, Powerdown

•

Software Powerdown

The AD7280 may be placed into full powerdown mode, which

requires only 4uA max current, by taking the PD pin low. The

falling edge of the PD pin will power down all analog and

digital circuitry.

The AD7280 may be placed into Software Power down mode,

which requires only 1mA of current by setting bit D8 in the

CONTROL register through the serial interface. When the

AD7280 is powered down through the serial interface the

regulator and the daisy chain circuitry stay powered up but the

remaining analog and digital circuitry is powered down. This is

necessary to ensure that the signal to power on the part, or

series of parts, is correctly received.

The AD7280 offers a PD TIMER register which allows the user

to program a set time after which the AD7280 will go into

power down. This will act as a time delay between the falling

edge of the PD input, or the setting of bit D8 in the CONTROL

set to a value between 0 and 31 minutes, with a resolution of 1

minute. The user should first write to the PD TIMER register,

to define the desired delay. Any subsequent falling edge on the

PD input or setting of bit D8 the CONTROL register, will start

the PD timer and after the programmed time will place the

AD7280 into powerdown. The default value of the PD TIMER

POWER UP TIME

As outlined in the Power Down section a full power down of

the AD7280, that is an active low on the PD input will power

down all analog and digital circuitry. The recommended power

up time for the internal reference, when decoupled with a 10µF

capacitor, is 5ms. It is recommended that no conversions be

completed until the 5ms power up time has elapsed as it may

result in inaccurate data.

CELL BALANCING OUTPUTS

The AD7280 provides 6 CB outputs which can be used to drive

the gate of external transistors as part of a cell balancing circuit.

Each CB output may be set to provide either a 0V or 5V output

with respect to the absolute amplitude of the negative terminal

of the battery cell which is being balanced. For example, the

CB6 output will provide a 0V or 5V output with respect to the

voltage on the Vin5 analog input. The CB outputs are set by

writing to the CELL BALANCE register. The default value of

the CELL BALANCE register on power up is 0h.

In an application which daisychains a number of AD7280s

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