XRT86VL32IB datasheet(18/154 Pages) EXAR

18 / 154 page

XRT86VL3X

T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION

REV. 1.2.3

1.9

Robbed Bit Signaling/CAS Signaling

Signaling is used to convey status information relative to the individual DS-0’s. If a particular DS-0 is On Hook,

Off Hook, etc. this information is carried within the robbed bits in T1 (SF/ESF/SLC-96) or the sixteenth time slot

in E1. On the transmit path, the Signaling information can be inserted through the PCM data, internal registers,

or a dedicated external Signaling Bus by programming the appropriate registers. On the receive path, the

signaling information is extracted (if enabled) to the internal registers and the external signaling bus in addition

to being embedded within the PCM data. If the user wishes to substitute the ABCD values, the substitution

only occurs in the PCM data. Once substituted, the internal registers and the external signaling bus will not be

affected. Figure 11 is a simplified block diagram showing the Signaling Interface. Figure 12 is a timing

diagram showing how to insert the ABCD values for each time slot in ESF / CAS. Figure 13 is a timing

diagram showing how to insert the AB values for SF / SLC-96 or 4-code signaling in ESF / CAS.

FIGURE 11. ROBBED BIT SIGNALING / CAS SIGNALING

FIGURE 12. ESF / CAS EXTERNAL SIGNALING BUS

RBS /CAS

Signaling

Substitution

PCM Data

Tx LIU

TSCR

Internal Reg 's

Rx LIU

Signaling

Extraction

PCM Data

RSAR

Internal Reg 's

Transmit Direction

Receive Direction

TxSER

TxCHN 0/

TxSIG

RxSER

RxCHN 0/

RxSIG

Physical

Interface

TxSYNC

TxMSYNC

TxSERclk

TxCHN0/TxSIG

TxSER

TS 1

TS 2

TS 3

XRT86VL32IB Datasheet(PDF) 18 Page - Exar Corporation

XRT86VL32IB Datasheet(HTML) 18 Page - Exar Corporation

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