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XRT86VL32IB Datasheet(PDF) 46 Page - Exar Corporation

Part # XRT86VL32IB
Description  T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
PDF  154 Pages
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT86VL32IB Datasheet(HTML) 46 Page - Exar Corporation

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XRT86VL3X
39
T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
REV. 1.2.3
4.2.3
Configure the DS1 Receive Overhead Output Interface module as destination of the
Signaling Framing (Fs) bits in N or SLC®96 framing format mode
The Fs bits in SLC®96 and N framing format mode can be extracted to:
• DS1 Receive Overhead Output Interface Block
• DS1 Receive HDLC Controller
• DS1 Receive Serial Output Interface.
The Receive Data Link Source Select bits of the Receive Data Link Select Register (RDLSR) controls the
destination of Fs bits in N or SLC®96 framing format mode. The table below shows configuration of the
Receive Data Link Source Select bits of the Receive Data Link Select Register (RDLSR).
If the Receive Data Link Source Select bits of the Receive Data Link Select Register are set to 10, the Receive
Overhead Output Interface Block outputs Fs bits extracted from the incoming T1 data stream.
FIGURE 39. DS1 RECEIVE OVERHEAD OUTPUT INTERFACE MODULE IN ESF FRAMING FORMAT MODE
RECEIVE DATA LINK SELECT REGISTER (TDLSR) (ADDRESS = 0XN10AH)
BIT
NUMBER
BIT NAME
BIT TYPE
BIT DESCRIPTION
1-0
Receive Data Link
Source Select
R/W
00 - The extracted Facility Data Link bits are stored in either the LAPD con-
troller or the SLC®96 buffer. At the same time, the extracted Facility Data
Link bits are outputted from the framer through the Receive Serial Data
Output Interface via the RxSer_n pins.
01 - The extracted Facility Data Link bits are outputted from the framer
through the Receive Serial Data Output Interface via the RxSer_n pins.
10 - The extracted Facility Data Link bits are outputted from the framer
through the Receive Overhead Output Interface via the RxOH_n pins. At
the same time, the extracted Facility Data Link bits are outputted from the
framer through the Receive Serial Data Output Interface via the RxSer_n
pins.
11 - The Facility Data Link bits are forced to one by the framer.
RxOhClk
(2KHz,even)
RxOh
(2KHz,even)
RxOh
(4KHz)
RxOhClk
(2KHz,odd)
RxOh
(2KHz,odd)
Frame#
RxSync
RxOhClk
(4KHz)
1
2
6
3
4
5
7
8
9
10
11
12
13
14
15
16
17
18
19
20



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