XRT86VL32IB datasheet(75/154 Pages) EXAR

75 / 154 page

XRT86VL3X

REV. 1.2.3

T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION

FIGURE 72. INTERFACING XRT86VL3X RECEIVE TO LOCAL TERMINAL EQUIPMENT USING 16.384MBIT/S, HMVIP

16.384MBIT/S, AND H.100 16.384MBIT/S

FIGURE 73. TIMING SIGNAL WHEN THE RECEIVE FRAMER IS RUNNING AT 16.384MHZ BIT-MULITPLEXED MODE

FIGURE 74. TIMING SIGNAL WEHN THE RECEIVE FRAMER IS RUNNING AT HMVIP AND H100 16.384MHZ MODE

RxSER0

RxSERCLK0 (12/16MHz)

RxSYNC0

Transmit

Payload

Data Input

Interface

Chn 0

Transmit

Payload

Data Input

Interface

Chn 4

Terminal

Equipment

XRT86VL38

Chn 1

Chn 2

Chn 3

Chn 5

Chn 6

Chn 7

RxSER4

RxSERCLK (12/16MHz)

RxSYNC4

RxSerClk (16.384MHz)

RxSerClk (INV)

RxSer

RxSync(input)

0 0 11 0

0 0 21 0

0 0

0 A0 51 A1 52 A2 53 A3

56 cycles

0 X h1 X

8-bit header

RxSerClk (16.384MHz)

RxSerClk (INV)

RxSer

2 52

0 10 20 20

0 50 60 60

3 73 83 83

2 h2 h3 h3

56 cycles

3 53 63 63 73 73 83 83

2 A2

0 0 0 0

0 A0 B0 B0

3C3D3D3

1 1 1 1

56 cycles

3 A3 B3 B3C3C3D3D3

RxSig

Start of Frame

y : X is the bit number and y is the channel number

RxSync(input)

H.100, negative sync

RxSync(input)

H.100, positive sync

RxSync(input)

HMVIP, negative sync

RxSync(input)

HMVIP, positive sync

XRT86VL32IB Datasheet(PDF) 75 Page - Exar Corporation

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