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XRT86VL32IB Datasheet(PDF) 80 Page - Exar Corporation

Part # XRT86VL32IB
Description  T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
PDF  154 Pages
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT86VL32IB Datasheet(HTML) 80 Page - Exar Corporation

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XRT86VL3X
73
T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
REV. 1.2.3
8.2
Transmit/Receive High-Speed Back-Plane Interface
The High-speed Back-plane Interface supports payload data to be taken from or presented to the Terminal
Equipment at different data rates. In the non-multiplexed mode, payload data of each channel are interfaced to
the Terminal Equipment separately.
Each channel uses its own serial clock, serial data, single-frame
synchronization signal and multi-frame synchronization signals.
8.2.1
T1 Transmit/Receive Interface - MVIP 2.048 MHz
The Back-plane interface is processing data at an E1 equivalent data rate of 2.048Mbit/s. The local Terminal
Equipment should pump in data grouped in 256-bit frame 8000 times every second. Each frame consists of
thirty-two octets as in E1. The local Terminal Equipment maps a 193-bit T1 frame into this 256-bit format as
described below:
1. The Framing (F-bit) is mapped into MSB of the first E1 Time-slot. The local Terminal Equipment will stuff
the other seven bits of the first octet with don't care bits that would be ignored by the framer.
2. Payload data of T1 Time-slot 0, 1 and 2 are mapped into E1 Time-slot 1, 2 and 3.
3. The local Terminal Equipment will stuff E1 Time-slot 4 with eight don't care bits that would be ignored by
the framer.
4. Following the same rules of Step 2 and 3, the local Terminal Equipment maps every three time-slots of T1
payload data into four E1 time-slots.
FIGURE 80. WAVEFORMS FOR CONNECTING THE RECEIVE PAYLOAD DATA INPUT INTERFACE BLOCK TO LOCAL TER-
MINAL
EQUIPMENT
C
RxSerClk
RxSer
RxSync(output)
RxCHClk
RxCHN[4:0]
RxCHN[0]/RxSig
RxCHClk
RxCHN[2]/RxCHN
RxCHN[1]/RxFrTD
c1 c2 c3 c4 c5
c1 c2 c3 c4 c5
c1 c2 c3 c4 c5
c1 c2 c3 c4 c5
8
7
6
5
4
3
2
1
A B
D
C
A B
D
C
A B
D
C
A B
D
Input Data
Input Data
Timeslot 23
Timeslot 0
Timeslot 5
Timeslot 6
Timeslot #0
Timeslot #5
Timeslot #6
Timeslot #23
Rx Fractional Enable Bit = 0
Rx Fractional Enable Bit = 1
F



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