XRT86VL32IB datasheet(86/154 Pages) EXAR

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XRT86VL3X

T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION

REV. 1.2.3

Transmit 16.384 Bit-Multiplexed Mode

Please refer to Figure 85 for how to interface the transmit payload data input interface block to the terminal

equipment. The local Terminal Equipment maps four 1.544Mbit/s DS1 data streams into this 16.384Mbit/s data

stream as described below:

1. The F-bit of four channels are repeated and grouped together to form the first octet of the multiplexed data

stream. The F-bit of Channel 0 is sent first, followed by F-bit of Channel 1 and 2. The F-bit of Channel 3 is

sent last. The table below shows bit-pattern of the first octet.

FX: F-bit of Channel X

2. After the first octet of data is sent, the local Terminal Equipment should insert seven octets (fifty-six bits) of

"don't care" data into the outgoing data stream.

3. Payload data of four channels are repeated and grouped together in a bit-interleaved way. The first pay-

load bit of Timeslot 0 of Channel 0 is sent first, followed by the first payload bit of Timeslot 0 of Channel 1

and 2. The first payload bit of Timeslot 0 of Channel 3 is sent last. After the first bits of Timeslot 0 of all four

channels are sent, it comes the second bit of Timeslot 0 of Channel 0 and so on. The table below demon-

strates how payload bits of four channels are mapped into the 16.384Mbit/s data stream.

XY: The Xth payload bit of Channel Y

4. The local Terminal Equipment also multiplexed signaling bits with payload bits and sent them together

through the 16.384Mbit/s data stream. When the Terminal Equipment is sending the fifth payload bit of

each channel, instead of sending it twice, it inserts the signaling bit A of that corresponding channel. Simi-

larly, the sixth payload bit of each channel is followed by the signaling bit B of that channel; the seventh

payload bit is followed by the signaling bit C; the eighth payload bit is followed by the signaling bit D.

FIGURE 86. TIMING SIGNALS WHEN THE TRANSMIT FRAMER IS RUNNING AT 12.352 BIT-MULTIPLEXED MODE

BIT 0

BIT 1

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

BIT 0

BIT 1

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

BIT 0

BIT 1

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

TxInClk (12.352MHz)

TxInClk (INV)

TxSer

TxSync(input)

0 F0 F1 F1 F2 F2 F3 F3 10 X 11 X

0 X 21 X

0 X

0 A0 51 A1 52 A2 53 A3 60 B0 61 B1 62 B2 63 B3

XRT86VL32IB Datasheet(PDF) 86 Page - Exar Corporation

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