XRT86VL32IB datasheet(87/154 Pages) EXAR

87 / 154 page

XRT86VL3X

REV. 1.2.3

T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION

The following table illustrates how payload bits and signaling bits are multiplexed together into the 16.384Mbit/

s data stream.

XY: The Xth payload bit of Channel Y

AY: The signaling bit A of Channel Y

5. After payload bits of Timeslot 0, 1 and 2 of all four channels are sent, the Terminal Equipment should stuff

another eight octets (sixty-four bits) of "don't care" data into the outgoing data stream.

6. Following the same rules of Step 2 to 5, the local Terminal Equipment stuffs eight octets of "don't care" data

after sending twenty-four octets of multiplexed payload and signaling data. A 16.384Mbit/s data stream is

thus created.

The Transmit Single-frame Synchronization signal of Channel 0 pulses HIGH for one clock cycle at the first bit

position (F-bit of channel 0) of the data stream with data from Channel 0-3 multiplexed together. The Transmit

Single-frame Synchronization signal of Channel 4 pulses HIGH for one clock cycle at the first bit position (F-bit

of Channel 4) of the data stream with data from Channel 4-7 multiplexed together. By sampling the HIGH pulse

on the Transmit Single-frame Synchronization signal, the framer can position the beginning of the multiplexed

DS1 frame. It is responsibility of the Terminal Equipment to align the multiplexed transmit serial data with the

Transmit Single-frame Synchronization pulse.

Inside the framer, all the "don't care" bits will be stripped away. The framing bits, signaling and payload data are

de-multiplexed inside the XRT86VL3x and send to each individual channel. These data will be processed by

each individual framer and send to LIU interface. The local Terminal Equipment provides a free-running

1.544MHz clock to the Transmit Serial Input clock of each channel. The framer will use this clock to carry the

processed payload and signaling data to the transmit section of the device.

Figure shows the timing signal when the transmit framer is running at 16.384 Bit-Multiplexed mode.

BIT 0

BIT 1

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

BIT 0

BIT 1

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

BIT 0

BIT 1

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

BIT 0

BIT 1

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

XRT86VL32IB Datasheet(PDF) 87 Page - Exar Corporation

XRT86VL32IB Datasheet(HTML) 87 Page - Exar Corporation

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