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AT697E Datasheet(PDF) 65 Page - ATMEL Corporation |
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AT697E Datasheet(HTML) 65 Page - ATMEL Corporation |
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65 / 154 page ![]() 64 AT697E 4226G–AERO–05/09 Debug Support Unit - DSU Overview The AT697 processor includes an hardware debug support unit to aid software debug- ging on target hardware. The support is provided through two modules: a debug support unit (DSU) and a debug communication link (DCL). The DSU can put the processor in debug mode, allowing read/write access to all pro- cessor registers and cache memories. The DSU also contains a trace buffer which stores executed instructions or data transfers on the internal bus. The debug communi- cations link implements a simple read/write protocol and uses standard asynchronous UART communications. Figure 38. Debug Support Unit and Communication Link It is possible to debug the processor through any master on the internal bus. The PCI interface is build in as a master on the internal bus. All debug features are available from any PCI master. Debug Support Unit The debug support unit is used to control the trace buffer and the processor debug mode. The DSU master occupies a 2 Mbyte address space on the internal bus. Through this address space, any other masters like PCI can access the processor registers and the contents of the trace buffer. The DSU control registers can be accessed at any time, while the processor registers and caches can only be accessed when the processor has entered debug mode. The trace buffer can be accessed only when tracing is disabled or completed. In debug mode, the processor pipeline is held and the processor is controlled by the DSU. Enter- ing the debug mode can occur on the following events: • executing a breakpoint instruction (ta 1) • integer unit hardware breakpoint/watchpoint hit (trap 0x0B) • rising edge of the external break signal (DSUBRE) • setting the break-now (BN) bit in the DSU control register • a trap that would cause the processor to enter error mode • occurrence of any, or a selection of traps as defined in the DSU control register • after a single-step operation AT697 SPARC V8 Integer unit I-Cache D-Cache AMBA AHB AT697 processor Debug Support Unit Debug Comm. Link AHB interface Debug I/F Trace Buffer DSUTX DSURX DSUEN DSUBRE DSUACT |
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