AT697E datasheet(39/154 Pages) ATMEL

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AT697E

4226G–AERO–05/09

value in MCFG1 register defines the number of waitstates to insert during a PROM

write.

PRRWS and PRWWS field can be programmed to take values from 0 up to 15. The

effective number of waitstates applied during an access is then twice the programmed

value. In that way, programming two waitstates result in the insertion of four wait cycles

during the access.

If the application needs more delay during the PROM access, it is possible to introduce

more delay acting on the bus ready line ( BRDY* ). If the BRDY* pin is set high, the pro-

cessor wait before ending the transfer. As soon as the BRDY* pin is driven low, the

processor ends the access.

After a reset operation of the processor (or at power up), the read and write waitstates

fields for the PROM area are set default to 15, resulting in 30 effective waitstates.

Write Protection

Write protection is provided to prevent accidental over-writing to PROM area. It is con-

trolled through the PROM write enable bit (PRWE*) from the memory configuration

cycle is available.

Bus width

To support applications with low memory and performance requirements, the PROM

area can be configured for 8-bit operations. The configuration of PROM in 8-bit mode is

done programming the ROM bus width field in he memory configuration registers

MCFG1.

When the PROM bus is configured as an 8-bit wide bus, data 31 downto 24 shall be

used as interface.

Figure 21. PROM 8-bit bus width connection

Since access to memory is always done on 32-bit word basis, read access to 8-bit mem-

ory will be transformed in a burst of four read cycles. If EDAC protection is active, 5 read

cycles are necessary to complete the access (please refer to protection section for more

details). During write operation, only the necessary bytes are writen.

In addition to the 8-bit mode, the PROM area can be configured for 16-bit accesses. In

this configuration, the PROM device is accessed with a burst of two 16-bit accesses. No

EDAC protection can be used with suh configuration.

When the bus is configured as an 16-bit wide bus, data 31 downto 16 shall be used as

interface.

PROM

OE*

AT697

A[27:0]

D[31:24]

A[27:0]

WRITE*

ROMS0*

AT697E Datasheet(PDF) 39 Page - ATMEL Corporation

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