AT697E datasheet(95/154 Pages) ATMEL

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AT697E

4226G–AERO–05/09

The period between each AUTO-REFRESH command is calculated as follows:

tREFRESH = ((reload value) + 1) / SYSCLK

Table 45. Memory Configuration Register 3 - MCFG3

Address = 0x80000008

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

rfc

srcrv

rb re pe

tcb

r/w

r/w r/w r/w r/w

r/w

xxx xxxx xxxx xxxx

xxxx xxxx

Bit Number

Mnemonic

Description

31:30

rfc

Indicates how many checkbits are used for the register file (11=7 (EDAC))

Memory EDAC

Indicates if a memory EDAC is present

26:12

srcrv

SDRAM refresh counter reload value.

EDAC diagnostic write bypass

EDAC diagnostic read bypass

RAM EDAC enable.

Enable EDAC checking of the RAM area

PROM EDAC enable.

Enable EDAC checking of the PROM area. At reset, this bit is initialised with the value of PIO[2]

7:0

tcb

Test checkbits.

This field replaces the normal checkbits during store cycles when WB is set. TCB is also loaded

with the memory checkbits during load cycles when RB is set.

Table 46. Write Protection Register 1 - WPR1

Address = 0x8000001C

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

en bp

tag[14:0]

mask[14:0]

r/w r/w

r/w

xx xxxx xxxx xxxx x

xxx xxxx xxxx xxxx

Bit Number

Mnemonic

Description

Enable.

If set, enables the write protect unit

Block protect

If set, selects block protect mode

AT697E Datasheet(PDF) 95 Page - ATMEL Corporation

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