AT697E datasheet(13/154 Pages) ATMEL

13 / 154 page

AT697

4226G–AERO–05/09

REQ* indicates to the arbiter that this agent desires use of the bus. This is a point-to-

point signal. Every master has its own REQ* which must be tri-stated while PCI_RST* is

asserted.

GNT* - PCI Bus Grant (input)

GNT* indicates to the agent that access to the bus has been granted. This is a point-to-

point signal. Every master has its own GNT* which must be ignored while PCI_RST* is

asserted.

PCI_CLK - PCI clock (input)

PCI_CLK provides timing for all transactions on PCI. All other PCI signals, except

PCI_RST*, are sampled on the rising edge of PCI_CLK and all other timing parameters

are defined with respect to this edge.

PCI_RST* - PCI Reset (input)

Reset is used to bring PCI-specific registers, sequencers, and signals to a consistent

state.

PERR* - Parity Error (bi-directional)

Parity Error is only for the reporting of data parity errors during all PCI transactions

except a Special Cycle. The PERR* pin is sustained tri-state and must be driven active

by the agent receiving data two clocks following the data when a data parity error is

detected. The minimum duration of PERR* is one clock for each data phase that a data

parity error is detected.

SERR* - System Error (bi-directional)

System Error is for reporting address parity errors, data parity errors on the special cycle

command, or any other system error where the result will be catastrophic. If an agent

does not want a non-maskable interrupt (NMI) to be generated, a different reporting

mechanism is required.

SYSEN* - PCI Host (input)

This active low input specifies the configuration of the device. At boot-up time, if

SYSEN* is sampled at a low level, the device is configured as the host of the PCI bus. If

SYSEN* is sampled at a high level, the device is configured as a satellite.

AT697E Datasheet(PDF) 13 Page - ATMEL Corporation