AT697E datasheet(49/154 Pages) ATMEL

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AT697E

4226G–AERO–05/09

Figure 34. I/O port block diagram - D[15:0]

configuring the pin

The upper 16 bits of the general purpose interface can only be configured as outputs or

inputs on byte basis. D[15:8] is referenced as the medium byte when D[7:0] is refer-

enced as the lower byte.

Each byte from D[15:0] consists of two register fields. As shown in the “Register

Description” section, the direction fields are accessed at IODIR address when data

fields at IODAT address.

The MEDDIR bit and the LOWDIR bit in the IODIR register select the direction for

respectively the medium byte ( D[15:8] ) and the lower byte ( D[7:0] ). If MEDDIR (or

LOWDIR) is written logic one, the corresponding byte in D[15:0] is configured as output.

If written logic zero, the byte is configured as an input.

When configured as an input, a read of the MEDDAT fileds in IODAT register returns the

current value of D[15:8]. When configured as an output, the logical value from MEDDAT

field in IODAT register is translated in physical values on D[15:8] bus.

When configured as an input, a read of the LOWDAT fileds in IODAT register returns the

current value of D[7:0]. When configured as an output, the logical value from LOWDAT

field in IODAT register is translated in physical values on D[7:0] bus.

switching between input &

output

When the medium byte (or the lower) is switched from input to output by switching MED-

DIR (or LOWDIR), the value of MEDDAT (or LOWDAT) is immediatly driven on the

corresponding pin. When switched from output to input by toggling MEDDIR (or

LOWDIR), the value from the pins are immediatly written to MEDDAT (or LOWDAT).

GPI Alternate functions

Most GPI pins have alternate functions in addition to being general I/O. Facilities like

serial communication link, interrupt input and configuration are made available through

these functions. The following table summaryses the assignement of the alternate

functions.

Table 17. GPI alternate functions

IO Direction Reg.

IO Data Reg.

MEDDIR/LOWDIR

MEDDAT/LOWDAT

D Q

clock

GPI port pin

Alternate function

PIO[15]

TXD1 - UART1 transmitter data

PIO[14]

RXD1 - UART1 receiver data

PIO[13]

RTS1 - UART1 request-to-send

PIO[12]

CTS1 - UART1 clear-to-send

PIO[11]

TXD2 - UART2 transmitter data

PIO[10]

RXD2 - UART2 receiver data

PIO[9]

RTS2 - UART2 request-to-send

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