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AT697E Datasheet(PDF) 29 Page - ATMEL Corporation

Part # AT697E
Description  Rad-Hard 32 bit SPARC V8 Processor
PDF  154 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT697E Datasheet(HTML) 29 Page - ATMEL Corporation

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AT697E
4226G–AERO–05/09
Diagnostic Cache
Access
Tags and data in the instruction and data cache can be accessed through ASI address
space 0xC, 0xD, 0xE and 0xF by executing LDA and STA instructions. Address bits
making up the cache offset will be used to index the tag to be accessed while the least
significant bits of the bits making up the address tag will be used to index the cache set.
Diagnostic read of tags is possible by executing an LDA instruction with ASI=0xC for
instruction cache tags and ASI=0xE for data cache tags. The cache line and the cache
set are indexed by the address bits making up the cache offset and the least significant
bits of the address bits making up the address tag.
Similarly, the data sub-blocks may be read by executing an LDA instruction with
ASI=0xD for instruction cache data and ASI=0xF for data cache data. The sub-block to
be read in the indexed cache line and set is selected by A[4:2].
The tags can be directly written by executing a STA instruction with ASI=0xC for the
instruction cache tags and ASI=0xE for the data cache tags. The cache line and cache
set are indexed by the address bits making up the cache offset and the least significant
bits of the address bits making up the address tag.
D[31:10] is written into the ATAG filed and the valid bits are written with the D[7:0] of the
write data. The data sub-blocks can be directly written by executing a STA instruction
with ASI=0xD for the instruction cache data and ASI=0xF for the data cache data. The
sub-block to be read in the indexed cache line and set is selected by A[4:2].
Note:
Diagnostic access to the cache is not possible during a FLUSH operation and will cause
a data exception (trap=0x09) if attempted.



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