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VG3617801CT Datasheet(PDF) 32 Page - Vanguard International Semiconductor |
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VG3617801CT Datasheet(HTML) 32 Page - Vanguard International Semiconductor |
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32 / 68 page  Document:1G5-0133 Rev.1 Page 32 VIS VG3617801CT 16Mb CMOS Synchronous Dynamic RAM T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 Power on Sequence and Auto Refresh (CBR) CLK CKE CS RAS CAS WE A11(BS) A10 A0~A9 DDM DQ High level is required Minimum of 2 Refresh Cycles are required t RSC t RP High Level is Necessary t RC Address Key Inputs be stable for 100us Precharge All Banks must Command 1st Auto Command Refresh 2nd Auto Refresh Command Mode Set Command Command Register |
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