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VG3617801CT Datasheet(PDF) 67 Page - Vanguard International Semiconductor |
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VG3617801CT Datasheet(HTML) 67 Page - Vanguard International Semiconductor |
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67 / 68 page  Document:1G5-0133 Rev.1 Page 67 VIS VG3617801CT 16Mb CMOS Synchronous Dynamic RAM T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 Precharge Termination of a Burst (2 of 2) CLK CKE CS RAS CAS WE A11(BS) A10 A0~A9 DQM DQ t CK3 Burst Length=4,8 or Full Page, CAS Latency=3 Activate Bank A Command Write Hi-Z Command RAa Bank A Activate Command Bank A CAb RAb RAb RAc Precharge Command Read Command Bank A High RAa RAc CAa DAa1 DAa0 QAb0 QAb1 QAb2 QAb3 tDPL t RP Bank A Activate Command Bank A Activate Command Bank A t RCD t RAS t RP Write Data is masked Precharge Termination of a Write Burst. Precharge Termination of a Read Burst. |
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