VG3617801CT datasheet(12/68 Pages) VML

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Document:1G5-0133

Rev.1

Page 12

VIS

VG3617801CT

16Mb CMOS Synchronous Dynamic RAM

2.5 Command Truth Table for CKE Note 1

Note 1. H : Hight level, L : low level, X : High or low level(Don't care).

2. CKE Low to High transition will re-enable CLK and other inputs asynchronously. A minimum setup time must be satisfied

before any command other than EXIT.

3. Power down and Self refresh can be entered only from the both banks idle state.

4. Must be legal command as defined in Operative Command Table.

5.IIIegal if tSREX is not satisfied.

Current state

CKE

n-1

RAS

CAS

Address

Action

Notes

Self refresh

(S.R.)

INVALID,CLK(n-1)would exit S.R.

S.R. Recovery

ILLEGAL

Maintain S.R.

Self refresh

recovery

Idle after tRC

ILLEGAL

Begin clock suspend next cycle

ILLEGAL

Exit clock suspend next cycle

Maintain clock suspend

Power down

(P.D.)

INVALID, CLK(n-1) would exit P.D.

EXIT

Maintain power down mode

Both banks

idle

Refer to operations in Operative

Command Table

Refer to operations in Operative

Command Table

Refer to operation in Operative

Command Table

Refresh

Op-

Code

Refer to operations in Operative

Command Table

Refer to operations in Operative

Command Table

Refer to operations in Operative

Command Table

Refer to operations in Operative

Command Table

Self refresh

Op-

Code

Refer to operations in Operative

Command Table

Power down

Any state

other than

listed above

Refer to operations in Operative

Command Table

Begin clock suspend next cycle

Exit clock suspend next cycle

Maintain clock suspend

P · D ·

Idle

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