AD9148BBCZ datasheet(33/73 Pages) AD

33 / 73 page

Preliminary Technical Data

AD9148

Rev. PrA | Page 33 of 73

Addr

(Hex)

Bit

Name

Function

Default

Coeff Q Byte 2

7:5

Coeff_4q[2:0]

Q-Path DAC Sinc-1 Filter Coefficient 5 (LSB) in twos

complement format.

Set this bit to 0.

3:0

Coeff_3q[6:3]

Q-Path DAC Sinc-1 Filter Coefficient 4 (MSB) in twos

complement format.

Set DAC SPI select = 0 to configure DAC 2 path.

Set DAC SPI select = 1 to configure DAC 4 path.

Coeff Q Byte 3

Set this bit to 0.

6:0

Coeff_4q[9:3]

Q-Path DAC Sinc-1 Filter Coefficient 5 (MSB) in twos

complement format.

Set DAC SPI select = 0 to configure DAC 2 path.

Set DAC SPI select = 1 to configure DAC 4 path.

I Phase Adj LSB

7:0

Phase Word I[7:0]

See Register 0x29.

I Phase Adj MSB

1:0

Phase Word I[9:8]

Phase Word I[9:0] is used to insert a phase offset between the

I and Q data paths.

Set DAC SPI select = 0 to configure DAC 1 path.

Set DAC SPI select = 1 to configure DAC 3 path.

Q Phase Adj LSB

7:0

Phase Word Q[7:0]

See Register 0x2B.

Q Phase Adj MSB

1:0

Phase Word Q[9:8]

Phase Word Q[9:0] is used to insert a phase offset between

the I and Q data paths.

Set DAC SPI select = 0 to configure DAC 2 path.

Set DAC SPI select = 1 to configure DAC 4 path.

I DC Offset LSB

7:0

DC Offset I[7:0]

See Register 0x2D.

I DC Offset MSB

7:0

DC Offset I[15:8]

DC Offset I[15:0] is a value added directly to the samples

written to the IDAC. The LSB bit weight is 20.

Set DAC SPI select = 0 to configure DAC 1 path.

Set DAC SPI select = 1 to configure DAC 3 path.

Q DC Offset LSB

7:0

DC Offset Q[7:0]

See Register 0x2F.

Q DC Offset MSB

7:0

DC Offset Q[15:8]

DC Offset Q[15:0] is a value added directly to the samples

written to the QDAC. The LSB bit weight is 20.

Set DAC SPI select = 0 to configure DAC 2 path.

Set DAC SPI select = 1 to configure DAC 4 path.

AD9148BBCZ Datasheet(PDF) 33 Page - Analog Devices

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