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AD9148BBCZ Datasheet(PDF) 69 Page - Analog Devices |
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AD9148BBCZ Datasheet(HTML) 69 Page - Analog Devices |
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69 / 73 page ![]() Preliminary Technical Data AD9148 Rev. PrA | Page 69 of 73 A total of 79 pins can be accessed thru the boundary scan register. They are as follows: • A[15:0]_P, A[15:0]_N, B[15:0]_P, B[15:0]_N • DCIA_P, DCIA_N, DCIB_P, DCIB_N, • FRAMEA_P, FRAMEA_N, FRAMEB_P, FRAMEB_N • RESETE • CSB, SCLK, SDIO, SDO • IRQ • PLL_LOCK Figure 91 shows the basic connection between the device pins and the boundary scan chain. The boundary scan allows connectivity checks of the device pins but does not allow for stimulating or querying the device core. When loading and unloading the AD9148 scan chain, note that: • When unloading the scan chain, if DCIA or FRAMEA are set on the pins, there is two bits set for each (Bit 42 and Bit 44 for DCIA and Bit 41 and Bit 43 for FRAMEA). If DCIB or FRAMEB are set on the pins, there is one bit set for each (Bit 42 for DCIB and Bit 41 for FRAMEB). • If the scan chain is used to load the output pins (IRQ, SDO, or PLL_LOCK), two bits are set when each output pin is read back. The two bits include the output pin of interest and the bit that is two locations lower on the scan chain (for example, to read back IRQ both Bit 4 and Bit 2 are set). • The SDIOEN signal cannot be read back. Also, when read back begins, the values of the RESETE, CSB, SCLK, and SDIO input pins are resampled. If the inputs have changed value since the sampling with the TAP PRELOAD command, this affects the read back results. The order of the scan chain readback is: SDOENA, SDO, PLL_LOCK, IRQ, SDI_preload, SDIO_current, SCLK_current, CSB_current, RESETE_current, PortB data, PortA data, DCIs, and FRAMES. CHIP CORE INPUT BSR INPUT PAD OUTPUT PAD OUTPUT BSR SERIAL IN (TDI) (SCAN IN) SCAN OUT (SCAN OUT) SERIAL OUT (TDO) UPDT_OUT Figure 91. Basic Connections Between Device Pins and the Boundary Scan Chain |
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