AD9148BBCZ datasheet(63/73 Pages) AD

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Preliminary Technical Data

AD9148

Rev. PrA | Page 63 of 73

DEVICE POWER DISSIPATION

The AD9148 has four supply rails: AVDD33, IOVDD, DVDD18,

and CVDD18.

The AVDD33 supply powers the DAC core circuitry. The power

dissipation of the AVDD33 supply rail is independent of the digital

operating mode and sample rate. The current drawn from the

AVDD33 supply rail is typically 98 mA (320 mW) when the

full-scale current of the four main DACs (DAC 1, DAC 2, DAC

3, and DAC 4) is set to the nominal value of 20 mA. Changing

the full-scale current directly impacts the supply current drawn

from the AVDD33 rail. For example, if the full-scale current of

the four main DACs is changed to 10 mA, the AVDD33 supply

current drops by 40 mA to 58 mA.

The IOVDD voltage supplies the serial port I/O pins (SCLK,

SDIO, SDO, CSB, TCK, TDI, TDO, TMS), the RESET pin, and

the IRQ pin. The voltage applied to the IOVDD pin can range

from 1.8 V to 3.3 V. The current drawn by the IOVDD supply

pin is typically 1 mA.

The DVDD18 supply powers all of the digital signal processing

blocks of the device. The power consumption from this supply

is a function of which digital blocks are enabled and the frequency

at which the device is operating.

The CVDD18 supply powers the clock receiver and clock

distribution circuitry. The power consumption from this

supply varies directly with the operating frequency of the

device. CVDD18 also powers the PLL. The power dissipation

of the PLL is typically 140 mW.

Figure 82 to Figure 87 detail the power dissipation of the AD9148

under a variety of operating conditions. All of the graphs are

taken with data being supplied to all four DACs. The power

consumption of the device does not vary significantly with

changes in the coarse modulation mode selected or analog

output frequency. Graphs of the total power dissipation are

shown along with the power dissipation of the DVDD18 and

CVDD18 supplies.

0.25

0.50

0.75

1.00

1.25

1.50

1.75

2.00

2.25

2.50

2.75

fDATA (MSPS)

1×

2×

4×

8×

Figure 82. Total Power Dissipation vs. fDATA with Coarse Modulation, PLL, and

Inverse Sinc Filter Disabled

fDATA (MSPS)

0.25

0.50

0.75

1.00

1.25

1.50

1.75

2.00

2.25

2.50

2.75

3.00

3.25

1×

2×

4×

8×

Figure 83. Total Power Dissipation vs. fDATA with Fine Modulation, PLL, and

Inverse Sinc Filter Disabled

fDATA (MSPS)

0.25

0.50

0.75

1.00

1.25

1.50

1.75

2.00

1×

2×

4×

8×

Figure 84. DVDD18 Power Dissipation vs. fDATA with Coarse Modulation, PLL,

and Inverse Sinc Filter Disabled

fDATA (MSPS)

0.25

0.50

0.75

1.00

1.25

1.50

1.75

2.00

2.25

2.50

1×

2×

4×

8×

Figure 85. DVDD18 Power Dissipation vs. fDATA with Fine Modulation, PLL,

and Inverse Sinc Filter Disabled

AD9148BBCZ Datasheet(PDF) 63 Page - Analog Devices

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