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DAC5688 Datasheet(PDF) 19 Page - Texas Instruments |
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DAC5688 Datasheet(HTML) 19 Page - Texas Instruments |
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19 / 55 page ![]() DAC5688 www.ti.com SLLS880B – DECEMBER 2007 – REVISED MAY 2010 Register name: CONFIG11 Address: 0x0B, Default 0x00 (Synced) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 phaseadd(31:24) 0 0 0 0 0 0 0 0 phaseadd(31:24) : The phaseadd(31:24) value is used to determine the frequency of the NCO. The two’s complement formatted value can be positive or negative and the LSB is equal to Fs/(2^32). Register name: CONFIG12 Address: 0x0C, Default 0x00 (Synced) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 qmc_gaina(7:0) 0 0 0 0 0 0 0 0 qmc_gaina(7:0) : Lower 8 bits of the 11-bit Quadrature Modulator Correction (QMC) gain word for DACA. The upper 3 bits are in the CONFIG15 register. The full 11-bit qmc_gaina(10:0) word is formatted as UNSIGNED with a range of 0 to 1.9990 and the default gain is 1.0000. The implied decimal point for the multiplication is between bit 9 and bit 10. Refer to formatting reference below. qmc_gaina(10:0) qmc_gaina(10:0) Format Gain Value [Binary] [Decimal] 00000000000 0 0 + 0/1024 = 0.0000000 00000000001 1 0 + 1/1024 = 0.0009766 ….. ….. …. 01111111111 1023 0 + 1023/1024 = 0.9990234 10000000000 [Default] 1024 1 + 0/1024 = 1.0000000 10000000001 1025 1 + 1/1024 = 1.0009766 ….. ….. …. 11111111111 2047 1 + 1023/1024 = 1.9990234 Register name: CONFIG13 Address: 0x0D, Default 0x00 (Synced) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 qmc_gainb(7:0) 0 0 0 0 0 0 0 0 qmc_gainb(7:0) : Lower 8 bits of the 11-bit QMC gain word for DACB. The upper 3 bits are in CONFIG15 register. Refer to CONFIG12 above for formatting. Copyright © 2007–2010, Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Link(s): DAC5688 |
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