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6402 Datasheet(PDF) 182 Page - Intel Corporation

Part # 6402
Description  Advanced Memory Buffer
PDF  250 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

6402 Datasheet(HTML) 182 Page - Intel Corporation

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Registers
182
Intel® 6400/6402 Advanced Memory Buffer Datasheet
14.3.3.3
NERR: Successive Error
This register is used to report successive errors. More than two bits can be set in this
register. This register contains bits specifying which errors occurred as related to the
FBD channel.
14.3.3.4
RECCFG: Configuration Register Error Log
This register contains the received address for an unimplemented configuration register
access error. The contents of this register are only valid when the error that set this
register is logged in the FERR or NERR register.
0RWCST
0
CMDCRCERR: SB CRC Error
Correctable. Logs in RECFBD registers. AMB drops the current command and
sources alerts.
Device:
NodeID
Function: 1
Offset:
90h
Bit
Attr
Default
Description
Device:
NodeID
Function: 1
Offset:
94h
Bit
Attr
Default
Description
31:8
RV
0
Reserved
7RWCST
0
Reserved
6RWCST
0
Reserved
5RWCST
0
INJERR: Error Injection has sourced an injected error bit in the status
return field (optional)
4RWCST
0
INJALERT: Error Injection has sourced an injected alert error (optional)
3RWCST
0
FEWEDGES: tClkTraining Violation (no sync cmd for 2x SYNCTRAININT -
typically 84 frames)
Logs in RECFBD registers. Sends Alerts NB. Triggers auto self refresh SM.
2RWCST
0
OVERTEMP: Temp > TEMPHI and temp enabled
Fatal. AMB shuts down.
1RWCST
0
UNIMPLCFG: Unimplemented Configuration Address
Correctable. Logs in RECCFG* registers. Drops the command.
0RWCST
0
CMDCRCERR: SB CRC Error
Correctable. Logs in RECFBD registers. Drops the current command and sources
alerts.
Device:
NodeID
Function: 1
Offset:
98h
Bit
Attr
Default
Description
15:13
RV
0
Reserved
12:10
RWST
0h
function:



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