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6402 Datasheet(PDF) 185 Page - Intel Corporation |
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6402 Datasheet(HTML) 185 Page - Intel Corporation |
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185 / 250 page ![]() Intel® 6400/6402 Advanced Memory Buffer Datasheet 185 Registers 14.3.5.2 CMD2DATACUR: Current Value of Command to Data Delay This register has the current value of the command to data delay. 14.3.5.3 C2DINCRNXT: Next Value of Command to Data Delay Increment This register has the next value of the command to data incremental delay. This will be used after the next fast reset. This will be used by the last AMB to delay driving the data beyond that specified in the command to data delay. 14.3.5.4 C2DINCRCUR: Current Value of Command to Data Delay Increment This register has the current value of the command to data incremental delay. This will be used by the last AMB to delay driving the data beyond that specified. 14.4 Implementation Specific FBD Registers (Function 2) No register information is available for the implementation specific registers. Device: NodeID Function: 1 Offset: E9h Bit Attr Default Description 7:4 ROST 0h DLYFRMS: Number of frames This specifies full frame delay part of the command to data delay. 0 - 9: Valid delays 10 - 15: Reserved 3:0 ROST 0h DLYFRAC: Fractional delay of command to data This specifies fractional frame delay part of the command to data delay. 0 - 11: Specifies the delay in 1UI increments 12 - 15: Reserved Device: NodeID Function: 1 Offset: EAh Bit Attr Default Description 7:2 RV 0h Reserved 1:0 RWST 0h INCRDLY: Incremental Delay for command to data 0 - 3: Specifies the incremental delay in frames Device: NodeID Function: 1 Offset: EBh Bit Attr Default Description 7:2 RV 0h Reserved 1:0 ROST 0h INCRDLY: Incremental Delay for command to data 0 - 3: Specifies the incremental delay in frames |
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