ADS4225 datasheet(67/104 Pages) TI1

67 / 104 page

1.65

1.7

1.75

1.8

1.85

1.9

1.95

69.5

70.5

71.5

DRVDD Supply (V)

SFDR

SNR

Input Frequency = 150MHz

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

2.2

69.5

70.5

71.5

Differential Clock Amplitude

)

SFDR

SNR

Input Frequency = 40MHz

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

2.2

64.5

65.5

66.5

67.5

68.5

69.5

70.5

71.5

Differential Clock Amplitude

)

SFDR

SNR

Input Frequency = 40MHz

69.5

70.5

71.5

72.5

Input Clock Duty Cycle (%)

THD

SNR

Input Frequency = 10MHz

ADS4222, ADS4225, ADS4226

ADS4242, ADS4245, ADS4246

www.ti.com

SBAS533C

– MARCH 2011 – REVISED JUNE 2011

TYPICAL CHARACTERISTICS: ADS4225 (continued)

At TA = +25°C, AVDD = 1.8V, DRVDD = 1.8V, maximum rated sampling frequency, sine wave input clock, 1.5VPP differential

clock amplitude, 50% clock duty cycle,

–1dBFS differential analog input, High-Performance Mode disabled, 0dB gain, DDR

LVDS output interface, and 32k point FFT, unless otherwise noted.

PERFORMANCE vs DRVDD SUPPLY VOLTAGE

PERFORMANCE vs INPUT CLOCK AMPLITUDE

Figure 118.

Figure 119.

PERFORMANCE vs INPUT CLOCK AMPLITUDE

PERFORMANCE vs INPUT CLOCK DUTY CYCLE

Figure 120.

Figure 121.

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Product Folder Link(s): ADS4222 ADS4225 ADS4226 ADS4242 ADS4245 ADS4246

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