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AM3871 Datasheet(PDF) 147 Page - Texas Instruments |
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AM3871 Datasheet(HTML) 147 Page - Texas Instruments |
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147 / 345 page  AM3874, AM3872, AM3871 www.ti.com SPRS695 – SEPTEMBER 2011 Table 4-11. PINCNTLx Registers MUXMODE Functions HEX MUXMODE[7:0] SETTINGS (1) REGISTER PIN ADDRESS NAME NO. 0x1 0x2 0x4 0x8 0x10 0x20 0x40 0x80 0x4814 0800 PINCNTL1 P3 SD1_CLK 0x4814 0804 PINCNTL2 P2 GP0[0] SD1_CMD (M0) 0x4814 0808 PINCNTL3 P1 SD1_DAT[0] 0x4814 080C PINCNTL4 P5 SD1_DAT[1]_SDIRQ 0x4814 0810 PINCNTL5 P4 SD1_DAT[2]_SDRW 0x4814 0814 PINCNTL6 P6 SD1_DAT[3] 0x4814 0818 PINCNTL7 W6 DEVOSC_WAKE SPI[1]_SCS[1] TIM5_IO (M1) GP1[7] (M0) 0x4814 081C PINCNTL8 Y6 SD0_CLK GP0[1] 0x4814 0820 PINCNTL9 N1 SD0_CMD GP0[2] SD1_CMD (M1) 0x4814 0824 PINCNTL10 R7 SD0_DAT[0] SD1_DAT[4] GP0[3] 0x4814 0828 PINCNTL11 Y5 SD0_DAT[1]_SDIRQ SD1_DAT[5] GP0[4] 0x4814 082C PINCNTL12 Y3 SD0_DAT[2]_SDRW SD1_DAT[6] GP0[5] 0x4814 0830 PINCNTL13 Y4 SD0_DAT[3] SD1_DAT[7] GP0[6] 0x4814 0834 PINCNTL14 L5 AUD_CLKIN0 MCA[0]_AHCLKX MCA[3]_AHCLKX USB1_DRVVBUS MCA[0]_AXR[7] (M1) 0x4814 0838 PINCNTL15 R5 AUD_CLKIN1 MCA[1]_AHCLKX MCA[4]_AHCLKX GP0[8] MCA[0]_AXR[8] (M1) EDMA_EVT3 (M1) TIM2_IO (M1) 0x4814 083C PINCNTL16 H1 AUD_CLKIN2 MCA[2]_AHCLKX MCA[5]_AHCLKX GP0[9] MCA[0]_AXR[9] (M1) EDMA_EVT2 (M1) TIM3_IO (M1) 0x4814 0840 PINCNTL17 R4 MCA[0]_ACLKX 0x4814 0844 PINCNTL18 L3 MCA[0]_AFSX 0x4814 0848 PINCNTL19 K2 MCA[0]_ACLKR MCA[5]_AXR[2] 0x4814 084C PINCNTL20 K1 MCA[0]_AFSR MCA[5]_AXR[3] 0x4814 0850 PINCNTL21 J2 MCA[0]_AXR[0] 0x4814 0854 PINCNTL22 J1 MCA[0]_AXR[1] I2C[3]_SCL (M0) 0x4814 0858 PINCNTL23 L4 MCA[0]_AXR[2] I2C[3]_SDA (M0) 0x4814 085C PINCNTL24 M5 MCA[0]_AXR[3] 0x4814 0860 PINCNTL25 R6 MCA[0]_AXR[4] MCA[1]_AXR[8] (M0) 0x4814 0864 PINCNTL26 M3 MCA[0]_AXR[5] MCA[1]_AXR[9] (M0) 0x4814 0868 PINCNTL27 M4 MCA[0]_AXR[6] MCB_DR 0x4814 086C PINCNTL28 L2 MCB_DX MCA[0]_AXR[7] (M0) 0x4814 0870 PINCNTL29 L1 MCB_FSX MCA[0]_AXR[8] (M0) MCB_FSR (M1) 0x4814 0874 PINCNTL30 M6 MCB_CLKX MCA[0]_AXR[9] (M0) MCB_CLKR (M1) 0x4814 0878 PINCNTL31 U5 MCA[1]_ACLKX 0x4814 087C PINCNTL32 V3 MCA[1]_AFSX 0x4814 0880 PINCNTL33 M1 MCA[1]_ACLKR MCA[1]_AXR[4] 0x4814 0884 PINCNTL34 M2 MCA[1]_AFSR MCA[1]_AXR[5] 0x4814 0888 PINCNTL35 V4 MCA[1]_AXR[0] SD0_DAT[4] (1) "(M0)" represents multimuxed option "0" for this pin function, "(M1)" represents multi-muxed option "1" for this pin function, ... etc. Copyright © 2011, Texas Instruments Incorporated Device Configurations 147 Submit Documentation Feedback Product Folder Link(s): AM3874 AM3872 AM3871 |
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