RM48L930 datasheet(113/147 Pages) TI1

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RM48L930

RM48L730

RM48L530

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SPNS176

– SEPTEMBER 2011

Table 5-4. Alternate MIBADC2 Event Trigger Hookup (continued)

Event #

Source Select Bits for G1, G2 or Event

Trigger

(G1SRC[2:0], G2SRC[2:0] or EVSRC[2:0])

110

N2HET1[11]

111

N2HET2[13]

The selection between the default MIBADC2 event trigger hook-up versus the alternate event trigger

hook-up is done by multiplexing control module register 30 bits 0 and 1.

If 30[0] = 1, then the default MibADC2 event trigger hook-up is used.

If 30[0] = 0 and 30[1] = 1, then the alternate MibADC2 event trigger hook-up is used.

NOTE

For AD2EVT trigger source, the connection to the MibADC2 module trigger input is made

from the output side of the input buffer. This way, a trigger condition can be generated either

by configuring AD2EVT as an output function on to the pad (via the mux control), or by

driving the AD2EVT signal from an external trigger source as input. If the mux control module

is used to select different functionality instead of the AD2EVT signal, then care must be

taken to disable AD2EVT from triggering conversions; there is no multiplexing on the input

connections.

NOTE

For N2HETx trigger sources, the connection to the MibADC2 module trigger input is made

from the input side of the output buffer (at the N2HETx module boundary). This way, a

trigger condition can be generated even if the N2HETx signal is not selected to be output on

the pad.

NOTE

For the RTI compare 0 interrupt source, the connection is made directly from the output of

the RTI module. That is, the interrupt condition can be used as a trigger source even if the

actual interrupt is not signaled to the CPU.

Peripheral Information and Electrical Specifications

113

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