WM8903 datasheet(134/178 Pages) WOLFSON

134 / 178 page

WM8903

Production Data

PD, Rev 4.5, June 2012

134

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R0 (00h)

SW Reset

and ID

15:0

SW_RST_DEV_ID1

[15:0]

1000_1001_0000_0011 Writing to this register resets all

registers to their default state.

Reading from this register will

indicate Device ID 8903h.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R1 (01h)

Revision

Number

3:0

CHIP_REV [3:0]

0010

Reading from this register will indicate the Revision

ID.

(Read-Only Register)

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R4 (04h)

Bias Control

POBCTRL

Selects the bias current source for output

amplifiers and VMID buffer

0 = Default bias

1 = Start-Up bias

3:2

ISEL [1:0]

Master Bias control

00 = Normal bias x 0.5

01 = Normal bias x 0.75

10 = Normal bias

11 = Normal bias x 1.5

STARTUP_BIAS_ENA

Enables the Start-Up bias current generator

0 = Disabled

1 = Enabled

BIAS_ENA

Enables the Normal bias current generator (for

all analogue functions)

0 = Disabled

1 = Enabled

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R5 (05h)

VMID

Control 0

VMID_TIE_ENA

VMID buffer to Differential Lineouts

0 = Disabled

1 = Enabled

(only applies when relevant outputs are disabled, ie.

SPLK=0 or SPKR=0. Resistance is controlled by

VROI.)

BUFIO_ENA

VMID buffer to unused input and output pins.

0 = Disabled

1 = Enabled

VMID_IO_ENA

Enables the Start-Up bias current generator

0 = Disabled

1 = Enabled

(same functionality as STARTUP_BIAS_ENA)

WM8903 Datasheet(PDF) 134 Page - Wolfson Microelectronics plc

WM8903 Datasheet(HTML) 134 Page - Wolfson Microelectronics plc

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