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WM8903 Datasheet(PDF) 145 Page - Wolfson Microelectronics plc |
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WM8903 Datasheet(HTML) 145 Page - Wolfson Microelectronics plc |
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145 / 178 page ![]() Production Data WM8903 w PD, Rev 4.5, June 2012 145 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 4 ADC_HPF_ENA 0 ADC Digital High Pass Filter Enable 0 = disabled 1 = enabled 1 ADCL_DATINV 0 Left ADC Invert 0 = Left ADC output not inverted 1 = Left ADC output inverted 0 ADCR_DATINV 0 Right ADC Invert 0 = Right ADC output not inverted 1 = Right ADC output inverted Register 26h ADC Digital 0 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R40 (28h) DRC 0 15 DRC_ENA 0 DRC enable 1 = enabled 0 = disabled 12:11 DRC_THRESH_HYST [1:0] 01 Gain smoothing hysteresis threshold 00 = Low 01 = Medium (recommended) 10 = High 11 = Reserved 10:6 DRC_STARTUP_GAIN [4:0] 0_0110 Initial gain at DRC startup 00000 = -18dB 00001 = -15dB 00010 = -12dB 00011 = -9dB 00100 = -6dB 00101 = -3dB 00110 = 0dB (default) 00111 = 3dB 01000 = 6dB 01001 = 9dB 01010 = 12dB 01011 = 15dB 01100 = 18dB 01101 = 21dB 01110 = 24dB 01111 = 27dB 10000 = 30dB 10001 = 33dB 10010 = 36dB 10011 to 11111 = Reserved 5 DRC_FF_DELAY 1 Feed-forward delay for anti-clip feature 0 = 5 samples 1 = 9 samples Time delay can be calculated as 5/fs or 9/ fs, where fs is the sample rate. 3 DRC_SMOOTH_ENA 1 Gain smoothing enable 0 = disabled 1 = enabled |
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