WM8903 datasheet(141/178 Pages) WOLFSON

141 / 178 page

Production Data

WM8903

PD, Rev 4.5, June 2012

141

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

LRCLK_DIR

Audio Interface LRC Direction

0 = LRC is input

1 = LRC is output

AIF_BCLK_INV

BCLK Invert

0 = BCLK not inverted

1 = BCLK inverted

BCLK_DIR

Audio Interface BCLK Direction

0 = BCLK is input

1 = BCLK is output

AIF_LRCLK_INV

LRC Polarity / DSP Mode A-B select.

Right, left and I2S modes – LRC polarity

0 = Not Inverted

1 = Inverted

DSP Mode – Mode A-B select

0 = MSB is available on 2nd BCLK rising edge

after LRC rising edge (mode A)

1 = MSB is available on 1st BCLK rising edge

after LRC rising edge (mode B)

3:2

AIF_WL [1:0]

Digital Audio Interface Word Length

00 = 16 bits

01 = 20 bits

10 = 24 bits

11 = 32 bits

1:0

AIF_FMT [1:0]

Digital Audio Interface Format

00 = Right Justified

01 = Left Justified

10 = I2S

11 = DSP

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R26 (1Ah)

Audio

Interface 2

4:0

BCLK_DIV [4:0]

0_1000

BCLK Frequency (Master Mode)

00000 = CLK_SYS

00001 = Reserved

00010 = CLK_SYS / 2

00011 = CLK_SYS / 3

00100 = CLK_SYS / 4

00101 = CLK_SYS / 5

00110 = Reserved

00111 = CLK_SYS / 6

01000 = CLK_SYS / 8 (default)

01001 = CLK_SYS / 10

01010 = Reserved

01011 = CLK_SYS / 12

01100 = CLK_SYS / 16

01101 = CLK_SYS / 20

01110 = CLK_SYS / 22

01111 = CLK_SYS / 24

WM8903 Datasheet(PDF) 141 Page - Wolfson Microelectronics plc

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