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DX58SO Datasheet(PDF) 33 Page - Intel Corporation

Part # DX58SO
Description  Technical Product Specification
PDF  88 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

DX58SO Datasheet(HTML) 33 Page - Intel Corporation

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Product Description
33
1.13.2.2
Fan Headers
The function/operation of the fan headers is as follows:
•
The fans are on when the board is in the S0 or S1 state.
•
The fans are off when the board is off or in the S3, S4, or S5 state.
•
Each fan header is wired to a fan tachometer input of the hardware monitoring and
fan control ASIC, except the fan header located at J7TH (item R on Figure 1,
page 11)
•
All fan headers support closed-loop fan control that can adjust the fan speed or
switch the fan on or off as needed
•
All fan headers have a +12 V DC connection
•
4-pin fan headers are controlled by Pulse Width Modulation
•
3-pin fan headers (front and rear) are modulated by voltage control
For information about
Refer to
The location of the fan headers
Figure 11, page 43
The location of the fan headers and sensors for thermal monitoring
Figure 6, page 27
The signal names of the fan headers
Section 0, page 42
1.13.2.3
LAN Wake Capabilities
CAUTION
For LAN wake capabilities, the +5 V standby line for the power supply must be capable
of providing adequate +5 V standby current. Failure to provide adequate standby
current when implementing LAN wake capabilities can damage the power supply.
LAN wake capabilities enable remote wake-up of the computer through a network.
The LAN subsystem PCI bus network adapter monitors network traffic at the Media
Independent Interface. Upon detecting a Magic Packet* frame, the LAN subsystem
asserts a wake-up signal that powers up the computer. Depending on the LAN
implementation, the board supports LAN wake capabilities with ACPI in the following
ways:
•
The PCI Express WAKE# signal
•
The PCI bus PME# signal for PCI 2.3 compliant LAN designs
⎯ By Ping
⎯ Magic Packet
•
The onboard LAN subsystem
•
Wake from CIR



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