LPC4370 datasheet(84/150 Pages) NXP

Part #	LPC4370

Description	32-bit ARM Cortex-M4 2 x M0 MCU 282 kB SRAM Ethernet two HS USBs 80 Msps 12-bit ADC configurable peripherals

PDF	150 Pages

Scroll/Zoom	100%

Manufacturer	NXP [NXP Semiconductors]

Direct Link	http://www.nxp.com

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84 / 150 page

LPC4370

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Product data sheet

Rev. 2 — 21 October 2013

84 of 150

NXP Semiconductors

LPC4370

32-bit ARM Cortex-M4/M0 microcontroller

Wake-up from the Power-down modes, Deep-sleep, Power-down, and Deep power-down,

is caused by an event on the WAKEUP pins or an event from the RTC or alarm timer.

When waking up from Deep power-down mode, the part resets and attempts to boot. After

booting, the M4 core is in active mode and both M0 cores remain in the reset state until

the reset is released by software.

7.24 Serial Wire Debug/JTAG

Debug and trace functions are integrated into the ARM Cortex-M4. Serial wire debug and

trace functions are supported in addition to a standard JTAG debug and parallel trace

functions. The ARM Cortex-M4 is configured to support up to eight breakpoints and four

watch points.

The ARM Cortex-M0 coprocessors support JTAG boundary scan only.

LPC4370 Datasheet(PDF) 84 Page - NXP Semiconductors