LPC4370 datasheet(85/150 Pages) NXP

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LPC4370

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Product data sheet

Rev. 2 — 21 October 2013

85 of 150

NXP Semiconductors

LPC4370

32-bit ARM Cortex-M4/M0 microcontroller

Limiting values

[1]

The following applies to the limiting values:

a) This product includes circuitry designed for the protection of its internal devices from the damaging effects of excessive static

charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maximum.

b) Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to VSS unless

otherwise noted.

c) The limiting values are stress ratings only and operating the part at these values is not recommended and proper operation is not

guaranteed. The conditions for functional operation are specified in Table 10.

[2]

Including voltage on outputs in 3-state mode.

[3]

The peak current is limited to 25 times the corresponding maximum current.

[4]

Dependent on package type.

[5]

Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k

 series resistor.

Table 7.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).[1]

Symbol

Parameter

Conditions

Min

Max

Unit

VDD(REG)(3V3)

regulator supply voltage

(3.3 V)

on pin VDDREG

0.5

3.6

VDD(IO)

input/output supply

voltage

on pin VDDIO

0.5

3.6

VDDA(3V3)

analog supply voltage

(3.3 V)

on pin VDDA

0.5

3.6

VBAT

battery supply voltage

on pin VBAT

0.5

3.6

Vprog(pf)

polyfuse programming

voltage

on pin VPP

0.5

3.6

input voltage

only valid when the VDD(IO)  2.2 V

5 V tolerant I/O pins

[2]

0.5

5.5

ADC/DAC pins and digital I/O

pins configured for an analog

function

0.5

VDDA(3V3)

USB0 pins USB0_DP;

USB0_DM;USB0_VBUS

0.3

5.25

USB0 pins USB0_ID;

USB0_RREF

0.3

3.6

USB1 pins USB1_DP and

USB1_DM

0.3

5.25

IDD

supply current

per supply pin

[3] -

100

ISS

ground current

per ground pin

[3] -

100

Ilatch

I/O latch-up current

(0.5V

DD(IO)) < VI < (1.5VDD(IO));

Tj < 125 C

100

Tstg

storage temperature

[4]

65

+150

C

Ptot(pack)

total power dissipation

(per package)

based on package heat transfer,

not device power consumption

-1.5

VESD

electrostatic discharge

voltage

human body model; all pins

[5]

+2000

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