HT49R50 datasheet(25/59 Pages) HOLTEK

25 / 59 page

HT49R50

October 22, 1999

Da t a B u s

Wr i t e

C h i p R es et

R e a d I/O

S y s t em W ak e- up ( P A onl y )

W eak

Pu l l - u p

PA0 ~ PA7

PB0 ~ PB7

PC 0 ~ PC 3

Op t i o n

V DD

Op t i o n

( P A0~ P A3,

PC )

V DD

O p t i o n ( PA0 ~ PA3 , P C )

Input/output ports

There are a 12-bit bidirectional input/output

port, an 8-bit input port in the HT49R50, la-

beled PA, PB and PC which are mapped to

[12H], [14H] and [16H] of the RAM, respec-

tively. PA0~PA3 can be configured as CMOS

(output) or NMOS (input/output) with or

without pull-high resistor by options. PA4~PA7

are always pull-high and NMOS (input/output).

If you choose NMOS (input), each bit on the port

(PA0~PA7) can be configured as a wake-up input.

PB can only be used for input operation, and each

bit on the port can be configured with pull-high

resistor. PC can be configured as CMOS output or

NMOS input/output with or without pull-high re-

sistor by options. All the port for the input opera-

tion (PA, PB and PC), these ports are

non-latched, that is, the inputs should be ready at

the T2 rising edge of the instruction MOV A,

[m] (m=12H or 14H). For PA, PC output opera-

tion, all data are latched and remain unchanged

until the output latch is rewritten.

When the PA and PC structures are open drain

NMOS type, it should be noted that, before

reading data from the pads, a 1 should be

written to the related bits to disable the NMOS

device. That is executing first the instruction

"SET [m].i" (i=0~7 for PA) to disable related

NMOS device, and then "MOV A, [m]" to get

stable data.

After chip reset, these input lines remain at the

high level or are left floating (by options). Each

bit of these output latches can be set or cleared

by the "SET [m].i" and "CLR [m].i" (m=12H or

16H) instructions.

Some instructions first input data and then fol-

low the output operations. For example, "SET

[m].i", "CLR [m].i", "CPL [m]", "CPLA [m]" read

the entire port states into the CPU, execute the

defined operations (bit-operation), and then

write the results back to the latches or to the ac-

cumulator.

HT49R50 Datasheet(PDF) 25 Page - Holtek Semiconductor Inc

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