UM0434 datasheet(91/390 Pages) STMICROELECTRONICS

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UM0434

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For details on the MAS

n registers, see Chapter 7.6.5: MMU assist registers (MAS) on

page 204.” The MAS0 register is shown in Table 73.

MAS0 fields are defined in

Table 74.

The MAS1 register is shown in

Table 75.

MAS1 fields are defined in

Table 76.

Table 73.

MAS Register 0 (MAS0) Format

32 33

42 43

47 48

58 59

Field

—

TLBSEL

—

ESEL

—

Reset

Undefined on

m_por assertion, unchanged on p_reset_b assertion

R/W

SPR

SPR 624

Table 74.

MAS0 - MMU read/write and replacement control

Bits

Name

Description

32–33

—

Reserved, should be cleared.

34–35

TLBSEL

Selects TLB for access.

01 TLB1 (ignored by the e200z3, should be written to 01 for future compatibility).

36–42

—

Reserved, should be cleared.

43–47

ESEL

Entry select for TLB1.

48–58

—

Reserved, should be cleared.

59–63

Next replacement victim for TLB1 (software managed). Software updates this field; it is copied

to the ESEL field on a TLB error (See

Table 156).

Table 75.

MMU assist register 1 (MAS1)

39 40

47 48

50 51 52

55 56

Field

VALID IPROT

—

TID

—

TSIZE

—

Reset

Undefined on

m_por assertion, unchanged on p_reset_b assertion

R/W

SPR

SPR 625

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