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UPD17217GT Datasheet(PDF) 69 Page - NEC |
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UPD17217GT Datasheet(HTML) 69 Page - NEC |
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69 / 84 page  µPD17215, 17216, 17217, 17218 69 AC Characteristics (VDD = 2.0 to 5.5 V, TA = –40 to +85 °C) Item Symbol Conditions MIN. TYP. MAX. Unit tCY1 VDD = 3.5 to 5.5 V 1.99 32.2 µs CPU Clock Cycle Time* (Instruction Execution Time) tCY2 VDD = 2.2 to 5.5 V 3.98 32.2 µs tCY3 7.96 32.2 µs INT High/Low Level Width tIOH, tIOL VDD = 4.5 to 5.5 V 10 µs 50 µs RESET Low Level Width tRSL VDD = 4.5 to 5.5 V 10 µs 50 µs *: The CPU clock cycle time (instruction execution time) is determined by the oscillation frequency of the oscillator connected and SYSCK (RF: address 02H) of the register file. The figure on the right shows the CPU clock cycle time tCY vs. supply voltage VDD characteristics (refer to 4. CLOCK GENERATOR CIRCUIT). 40 32 10 9 8 7 6 5 4 3 2 0123456 t vs VDD CY Supply voltage V [V] DD 2.2 |
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