UPD17217GT datasheet(16/84 Pages) NEC

16 / 84 page

µPD17215, 17216, 17217, 17218

2.4.2

System registers (SYSREG)

The system registers are registers that are directly related to control of the CPU. These registers are mapped to

addresses 74H-7FH on the data memory and can be referenced regardless of bank specification.

The system registers include the following registers:

Address registers (AR0-AR3)*

Window register (WR)

Bank register (BANK)*

Memory pointer enable flag (MPE)

Memory pointers (MPH, MPL)

Index registers (IXH, IXM, IXL)

General register pointers (RPH, RPL)

Program status word (PSWORD)

The address register (AR3) and the bank register (BANK) are fixed to 0 in the

µPD17215 and 17216.

Fig. 2-5 Configuration of System Register

b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0

74H

75H

76H

77H

78H

79H

7AH

7BH

7CH

7DH

7EH

7FH

AR 3

AR 2

AR 1

AR 0

BANK

IXH

IXM

IXL

RPH

RPL

PSW

MPH

MPL

Address register

(AR)

Window

(WR)

Bank

(BANK)

Data memory

row address

pointer (MP)

Index register

(IX)

General

pointer

(RP)

Program

status

word

(PSWORD)

000

(RP)

(IX)

(MP)

(BANK)

Data

Bit

Symbol

Name

Address

Initial

Value

Reset

0000 0 0 0 0 0 0 0 00000

0 0 00 0 0 0 00000 0 0 0 0 0 0 0 00000 0000

Undefined

(WR)

(AR) ( PD17217, 17218)

(AR) ( PD17216)

(AR) ( PD17215)

0000 0

0000

*: This bit is fixed to 0 in the

µPD17215 and 17216.

UPD17217GT Datasheet(PDF) 16 Page - NEC

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