LC87FBG08A

No.A2046-12/30

Recommended Unused Pin Connections

Port Name

Recommended Unused Pin Connections

Board

Software

P00 to P07

Open

Output low

P10 to P17

Open

Output low

P20 to P21

Open

Output low

P70

Open

Output low

CF1/XT1

Pulled low with a 100k

Ω resistor or less

General-purpose input port

CF2/XT2

Pulled low with a 100k

Ω resistor or less

General-purpose input port

On-chip Debugger Pin Connection Requirements

For the treatment of the on-chip debugger pins, refer to the separately available documents entitled "RD87 on-chip

debugger installation manual".

Power Pin Treatment Recommendations (VDD1, VSS1)

Connect bypass capacitors that meet the following conditions between the VDD1 and VSS1 pins:

• Connect among the VDD1 and VSS1 pins and bypass capacitors C1 and C2 with the shortest possible heavy lead

wires, making sure that the impedances between the both pins and the bypass capacitors are as possible (L1=L1’ ,

L2=L2’).

• Connect a large-capacity capacitor C1 and a small-capacity capacitor C2 in parallel.

The capacitance of C2 should approximately 0.1

μF.

VSS1

VDD1

L1’

L2’

L1

L2

C1

C2